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Optimizing Transformer Neural Network for Real-Time Outlier Detection on FPGAs

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Computer Science > Machine Learning

arXiv:2607.22786 (cs)
[Submitted on 24 Jul 2026]

Title:Optimizing Transformer Neural Network for Real-Time Outlier Detection on FPGAs

View a PDF of the paper titled Optimizing Transformer Neural Network for Real-Time Outlier Detection on FPGAs, by Ilia Sobakinskikh and Paul Alexander Bilokon
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Abstract:In this work, we explore how the inference time of a Transformer Neural Network can be efficiently optimized with applications to real-time anomaly detection in financial time series. The financial time series are price series such as asset prices. Unfortunately, the data is often with errors or outliers that make the downstream data processing tasks useless, unstable or even harmful. Moreover, the amount of financial time-series data has been significantly increasing. Hence, there is a need for better data-cleaning methods in terms of accuracy and in terms of processing speed.
Transformers as a neural network architecture have achieved superior performances in many tasks such as Natural Language Processing and Computer Vision. Time series modelling and especially anomaly detection tasks can benefit from the features of transformers architecture in multiple ways, including the capacity to capture long-range dependencies and interactions.
Increasingly powerful hardware, such as field-programmable gate arrays (FPGAs), have seen increasing usage in recent years due to their reconfigurability and high performance. They can be efficiently utilized to speed up the computations of the Transformer architecture.
We explore different Transformer architectures for time series modelling and how they can be efficiently implemented on an FPGA board (PYNQ-Z2). In particular, we examine the application of Transformers to detect anomalies in time series and we show how they can be efficiently implemented on an FPGA board to minimize latency.
The code is available at this https URL
Subjects: Machine Learning (cs.LG); Artificial Intelligence (cs.AI); Hardware Architecture (cs.AR); Distributed, Parallel, and Cluster Computing (cs.DC); Performance (cs.PF); Computation (stat.CO)
MSC classes: 68W35 (Primary), 68T07, 62M45 (Secondary)
ACM classes: I.2.6; C.3; I.5.4
Cite as: arXiv:2607.22786 [cs.LG]
  (or arXiv:2607.22786v1 [cs.LG] for this version)
  https://doi.org/10.48550/arXiv.2607.22786
arXiv-issued DOI via DataCite (pending registration)
Journal reference: The Journal of FinTech, Vol. 5, No. 1, 2550001 (2025)
Related DOI: https://doi.org/10.1142/S2705109925500014
DOI(s) linking to related resources

Submission history

From: Paul Bilokon [view email]
[v1] Fri, 24 Jul 2026 12:09:19 UTC (1,455 KB)
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