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Design-Time Optimization of Deep Neural Networks for Intermittent Learning on Microcontrollers

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Computer Science > Machine Learning

arXiv:2608.03589 (cs)
[Submitted on 4 Aug 2026]

Title:Design-Time Optimization of Deep Neural Networks for Intermittent Learning on Microcontrollers

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Abstract:We present a method for designing deep neural networks (DNNs) for intermittent, energy-autonomous, on-device learning on microcontroller units (MCUs). In mobile applications where the energy can run out, e.g., when solar-powered, executing artificial intelligence (AI) faces a technical issue as learning can be interrupted at any time. Our approach combines a hardware-aware energy prediction model with multi-objective optimization (MOO), enabling offline DNN optimization at the design stage without repeated deployment and online testing on the target MCU. Our proposed energy predictor estimates per-layer energy consumption for both DNN inference and training, including the intermittent checkpointing overhead, based on implementation-specific compute and memory features extracted from the DNN model. We validate our approach using autoencoders for anomaly detection on a Cortex-M4 MCU, where our predictor achieves a weighted absolute percentage error of 16.6%, which is sufficient for reliable architecture selection under intermittency constraints. As a result, this work bridges the gap between MOO, automated DNN design, deployment on energy-harvesting systems, and intermittent learning, truly enabling autonomous AI at the edge.
Comments: Accepted at the 7th Workshop on IoT, Edge, and Mobile for Embedded Machine Learning (ITEM) collocated with ECML PKDD 2026, 12 pages, 5 figures, 1 table,
Subjects: Machine Learning (cs.LG)
Cite as: arXiv:2608.03589 [cs.LG]
  (or arXiv:2608.03589v1 [cs.LG] for this version)
  https://doi.org/10.48550/arXiv.2608.03589
arXiv-issued DOI via DataCite (pending registration)

Submission history

From: Mark Deutel [view email]
[v1] Tue, 4 Aug 2026 12:43:19 UTC (340 KB)
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